Files
sentiment-engine/prod/docs/POST_FINISH.md
2026-07-13 17:25:34 +02:00

119 lines
7.5 KiB
Markdown
Raw Blame History

This file contains ambiguous Unicode characters

This file contains Unicode characters that might be confused with other characters. If you think that this is intentional, you can safely ignore this warning. Use the Escape button to reveal them.

# POST_FINISH — the parking lot (parked with love, not killed)
**Standing rule (operator + Fable, 2026-07-10):** until the FINISH LINE is
crossed, new scope lands HERE, not in code. Fable answers new scope with
"parked" — even to the operator. Especially to the operator.
## THE FINISH LINE (frozen — only these three count)
1. **Parity RESIDUAL = 0** over N windows (codex dossier machinery,
`uv/parity-certification`)
2. **72h clean on VST** on the merged stack (`a2b0fac`+): no §4 anomalies —
no orphan orders, no journal gaps, tripwire quiet
3. **Operator gate:** small real capital, separate account, BLUE untouched
## SEQUENCED (above parked — operator 2026-07-11: "it is costing us money")
- **Smart OB exec: PINK ExecutionRouter integration** — FIRST task upon parity
(item 1) completion, before/alongside items 2–3. Asset exists certified
(265 tests incl. live VST E2E, maker_both ran production). Slots below the
kernel at the venue-adapter seam — parity-invisible. Economics: taker RT
~0.10% → maker-both ~0.04%; smoke-run day-1 flips breakeven → +0.9%
equal-weight. Research: 90%+ of orders fill as maker ("move to us").
**CRITICAL READING:** `prod/docs/BingX_FILL_CHARACTERIZATION_AND_ADVANTAGES.md`.
**SPEC WRITTEN (2026-07-13):** `prod/docs/SPEC_UV_SMART_EXEC_MM.md` — urgency
ladder, contract, rollout; adjudication is its sub-task 1.
**SOA ADJUDICATION (first sub-task, Fable):** TWO exec assets exist —
(a) PINK ExecutionRouter: maker/taker POLICY, 265 tests, maker_both ran live;
(b) BLUE `alpha_engine/execution/` **SmartPlacer**: OB-aware PLACEMENT
(fill_simulator w/ 30s bookDepth, signal_confidence_adapter bridging Alpha
conviction → placement, ob_reader, smartplacer_constants). Likely
complementary (Router = maker-vs-taker; SmartPlacer = where-in-book).
Adjudicate router ∪ placer ∪ union against the fill-characterization doc
before integrating either.
## PARKED (specced where noted; zero build until finish)
- **IMPETUS build** — spec `IMPETUS_SPEC.md` + annex
`IMPETUS_SPEC_ANNEX_UV_INTEGRATION.md` (steel-clock plug, ASEx placement,
last-tick table). Paper done; build parked.
- **MALKHUT hose adaptation** — Fable's job when unparked (memory:
malkhut-hose-adaptation-fable)
- **JIMINY / PINOCCHIO** — ASEx fleet scoreboard + false-green detector
- **TP/SL cadence ladder L2/L3** — pulse-host tick path, Rust reflex engine
(spec `UV_TPSL_ENGINE_AND_REMAINING_DEV_SPEC.md` §1)
- **305M ring upgrade** — producer-side cached index in `uv_steel::ring`
(PASS9, ~10 lines + bench)
- **wCQ wait-free MPMC** — L3 mailbox candidate (`305MM_OPS_ALGO_ANNEX_FIFO.md`)
- **★ IMPETUS WIRE-ATOMIC (operator 2026-07-11, "insane, write it down")** —
exchange-wire→zinc-shm ATOMIC: the venue packet's tick becomes visible to
shm readers as ONE indivisible act, no intermediating copies/queues/threads.
Concretely: kernel-bypass ingest (AF_XDP / DPDK / io_uring registered
buffers — NIC DMAs frames into user memory), parse-in-place off the wire
buffer, single seqlock commit into `impetus_last` as the SAME pinned
thread's next instruction. Latency floor becomes NIC+parse (~µs), and the
atomicity contract extends end-to-end: a reader can never observe a tick
the wire didn't deliver, nor miss one it did (A2/A5 doctrine stretched to
the physical boundary). Prereqs: IMPETUS v1 shipped; WS/stream adapters
(annex R2); pinned-emit thread (annex R4); flat-C last-tick table (R3) —
each is a rung TOWARD this. TLS termination path (operator follow-up: the
sought term was "homomorphic" — FHE itself is 1e6-1e9x too slow, wrong
universe): SOA answers preserving wire-atomicity, in preference order:
(1) NIC inline TLS RX offload (ConnectX/kTLS-offload — silicon decrypts
AES-GCM at wire speed BEFORE DMA; buffer lands already-plaintext; CPU never
sees ciphertext); (2) kernel kTLS (decrypt in-kernel, zero-copy up);
(3) VAES/AES-NI decrypt-IN-PLACE (plaintext overwrites ciphertext in the
same buffer, ~1-4 cycles/byte — "decoded where it lies").
- **`uv_steel` crate extraction** — pulse-host modules → shared workspace crate
- **PASS9 mass-test regeneration** — far-end assertions, no broken codegen
- **BLUE trade_events dedup DDL** — operator-blessed write into dolphin ns
- **Vendor reconciliation** — T0-DEVIATION port upstream + vendor_sync
--from-committed-HEAD hardening
- **UvExecRunner consolidation** — route legacy direct async path through the
ASEx owner or retire it (execution-gate dossier §6.6)
- **Journal EXIT-labeling cleanup** — no-entry scans mislabeled EXIT (cosmetic)
- **Fleet identity hygiene** — stale zellij names, fossil handles, split bus
- **★ SHARP TODO (operator 2026-07-11): 375-branch upside study** — realized
upside under favorable-extension vs realized loss; left-tail cure hypothesis
(losses huge incl. scan-cadence SL misses; winners cramped). Depends on:
MAX_HOLD full-modulation port + ingress journaling
(UV_EXIT_DOCTRINE_PARITY_DESIGN.md D1.2). OB-cascade cause tuning rides the
same data.
- **★ RESEARCH (operator 2026-07-13): dvol quanta sweep × market regime** —
sweep the vol-gate threshold across its entire range; per quantum measure
trade result / ROI / DD / all metrics; then the same MODULO market regime
(MARAS-or-whatever fingerprinting — regime tagging itself "more or less
solved but not conclusively"). PREREQ (small, cheap, do before the sweep):
persist the per-trade dvol value AT ENTRY (not just gate pass/fail) — same
field the DDSketch self-tuning gate needs. Existing single data point:
EXP_VOL_GATE_RELAX 2026-07-04 (relaxed −17,847 / 189 trades vs normal
+3.54 avg / 7,883) + F5 relax window 2026-07-12/13 (4 ADVSL losers,
MFE ≤ +0.013%).
- **★ RESEARCH (operator 2026-07-13): scan-cadence effects study (11.06s UV
vs 5.97s NG7-pinned BLUE)** — cadence effects on EVERYTHING: ROI, SL/TP
achieved gain/loss, opportunity cost. Includes the bar-denomination
question: are bar-constants (ADVSL min_hold=20, MAX_HOLD 100/125/250/375)
hold-TIME (wall-clock, convert via avg scan duration) or evidence-COUNT
(N OBF observations)? Empirical, decides whether to time-normalize or
cadence-match. Related: TP-overshoot mechanism — BLUE effective TP ~0.3
vs 0.20 configured: bar-cadence miss (beneficial upswing capture) vs
modulation×1.40; measure exit_pct − tp_effective_pct on BLUE TP exits.
UV at-tick TP_FLOOR (arm at .20 sharp, exit on give-back) is the operator's
current best expression; keep unless study finds better.
- **★ RESEARCH (operator 2026-07-13): win/loss streak wave-phase alignment** —
treat win-loss/loss-win STREAKS as a wave (profit/loss as amplitude);
test PHASE match (in-phase / out-of-phase) against vel_div regimes,
quantized to the 11s/6s scan cadence. If found and stat-significant,
operator conviction: these waves are the unlock for the SHORT/LONG
regime-switch grail.
## Not parked (allowed work)
Anything that directly serves items 1–3, bug fixes on the live path, and
operator-ordered exceptions (which must say "unpark X" explicitly).
## DESIRABLE (north-star, operator 2026-07-11 — not parked, no build yet)
- **Full-universe picking**: system should someday select from the ENTIRE
Binance (~500-asset, as minimum reference) universe, not the 50-symbol
NG7 feed slice — research indicates full-universe selection improves
ROI/WR/joy. MALKHUT asset directory (malkhut/assets/) is built to that
scale; the feed is the current bottleneck, not the store.