uv(parity): DITAv2 multi-leg capability note — built (extra week), verify end-to-end before ADVSL wiring
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@@ -147,3 +147,12 @@ dormant state (present, wired identically, firing identically — i.e. never)
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or parity breaks in UV's favor of a mechanism BLUE doesn't actually express.
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or parity breaks in UV's favor of a mechanism BLUE doesn't actually express.
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Same verification applies to each modulation branch separately (cascade vs
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Same verification applies to each modulation branch separately (cascade vs
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withdrawal vs per-asset — one may fire while others are dead).
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withdrawal vs per-asset — one may fire while others are dead).
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**⚠ OPERATOR (multi-leg transport): DITAv2 WAS BUILT multi-leg capable —
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it cost an extra week.** `KernelIntent.exit_leg_ratios` is not vestigial;
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the kernel/FSM/venue path was designed for partial-exit legs. Before wiring
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ADVSL legs through it, VERIFY the full chain still functions end-to-end
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(kernel FSM partial-exit states → venue partial close → residual position
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accounting → journal), with tests — capability was built, but it has not
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been exercised by UV; treat as built-but-unproven until a leg round-trips
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on VST.
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